Embedded systems may be under strict power, cost, and size constraints, and therefore often employ lightweight security protocols. Further, they may be incorporated into mobile devices, and may be particularly vulnerable to physical attacks. Silicon physically unclonable functions (PUFs) leverage intrinsic manufacturing variability of deep submicron technology to create and provide single cycle, low-power and low-area security mechanisms. Since each PUF may be unique, two PUFs with the same basic design that receive the same challenge input may produce different responses. Thus, PUFs may be relatively effective at performing traditional security tasks such as authentication, digital rights management tasks related to FPGA security, remote enabling and disabling, and proof of software execution on a certain processor.
PUFs made of a single delay path constructed of a series of two-input/two-output switches may be potentially predictable, susceptible to induced operational conditions, and/or may be easily reverse-engineered. Attempts to fix these issues have included adding feed-forward arbiters to the PUF structures in order to introduce non-linear properties to PUF behavior. Other attempts to fix these issues have included adding interface hash-functions to the PUF structures. But these attempts may be considered to have limited effectiveness. In particular, hash functions may take up significant chip space and may introduce latency. Also, PUFs with non-linearity from the use of feed-forward arbiters may still be considered insecure.